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Technical Leader/Senior Hardware Engineer - Hardware System & Board Failure Analysis
Diverse Lynx LLC
2 days ago
Full-time
On-site
San Jose, California, United States
$100,000 - $150,000 USD yearly
Title: Technical Leader/Senior Hardware Engineer - Hardware System & Board Failure Analysis
Location: San Jose, CA (Remote)
Employment Type: Full Time
Salary Range - $ 100,000 - $150,000/Annum
Job Description
Must Have Technical/Functional Skills
Education & Experience: B.S. or M.S. in Electrical Engineering, Computer Engineering, Materials Science, or related field with 10+ years of progressive experience in hardware engineering, board design, or system-level failure analysis.
High-Speed Hardware Expertise: Well versed in modern system architectures (PCIe Gen4/5/6, DDR4/5, HBM, 56G/112G/224G SerDes, Eligible to workical transceivers).
Power & Signal Integrity: Proven ability to debug complex power distribution network issues (multi-phase VRM transient droop, PMBus/SVID telemetry, switching noise) and high-speed signal integrity anomalies.
Supplier Engagement: Hands-on experience directing external silicon suppliers and analytical laboratories through component-level physical FA.
Communication: Strong executive presence with proven capability to articulate complex technical findings to cross-functional leaders and enterprise customers.
Key Responsibilities
Investigation Leadership: Lead end-to-end technical investigations for critical field escalations and complex system failures spanning hardware, signal integrity, power delivery, thermal dynamics, and firmware.
Experimental Test Planning: Formulate structured FA hypotheses, architect fault isolation trees, and direct lab engineers/technicians in executing test plans on high-speed boards and multi-chassis systems.
Multi-Domain Root Cause Analysis: Drive cross-functional root cause isolation interfacing with ASIC Architecture, Signal Integrity (SI), Power Integrity (PI), Mechanical/Thermal, Diagnostics, and Software engineering teams.
Vendor & OSAT Management: Partner with component vendors, semiconductor foundries, and packaging houses (OSATs) to drive component-level physical FA (CSAM, X-Ray, FIB, SEM/EDX, decapsulation, micro-probing).
Design Feedback (DFX): Synthesize field and manufacturing failure data to drive Design-for-Reliability (DFR), Design-for-Debug (DFD), and Design-for-Manufacturing (DFM) requirements into next-gen hardware.
Mentorship & Process Excellence: Establish standardized RCFA methodologies, define best-in-class 8D report standards, and mentor junior engineers across the FA team.
Location: San Jose, CA (Remote)
Employment Type: Full Time
Salary Range - $ 100,000 - $150,000/Annum
Job Description
Must Have Technical/Functional Skills
Education & Experience: B.S. or M.S. in Electrical Engineering, Computer Engineering, Materials Science, or related field with 10+ years of progressive experience in hardware engineering, board design, or system-level failure analysis.
High-Speed Hardware Expertise: Well versed in modern system architectures (PCIe Gen4/5/6, DDR4/5, HBM, 56G/112G/224G SerDes, Eligible to workical transceivers).
Power & Signal Integrity: Proven ability to debug complex power distribution network issues (multi-phase VRM transient droop, PMBus/SVID telemetry, switching noise) and high-speed signal integrity anomalies.
Supplier Engagement: Hands-on experience directing external silicon suppliers and analytical laboratories through component-level physical FA.
Communication: Strong executive presence with proven capability to articulate complex technical findings to cross-functional leaders and enterprise customers.
Key Responsibilities
Investigation Leadership: Lead end-to-end technical investigations for critical field escalations and complex system failures spanning hardware, signal integrity, power delivery, thermal dynamics, and firmware.
Experimental Test Planning: Formulate structured FA hypotheses, architect fault isolation trees, and direct lab engineers/technicians in executing test plans on high-speed boards and multi-chassis systems.
Multi-Domain Root Cause Analysis: Drive cross-functional root cause isolation interfacing with ASIC Architecture, Signal Integrity (SI), Power Integrity (PI), Mechanical/Thermal, Diagnostics, and Software engineering teams.
Vendor & OSAT Management: Partner with component vendors, semiconductor foundries, and packaging houses (OSATs) to drive component-level physical FA (CSAM, X-Ray, FIB, SEM/EDX, decapsulation, micro-probing).
Design Feedback (DFX): Synthesize field and manufacturing failure data to drive Design-for-Reliability (DFR), Design-for-Debug (DFD), and Design-for-Manufacturing (DFM) requirements into next-gen hardware.
Mentorship & Process Excellence: Establish standardized RCFA methodologies, define best-in-class 8D report standards, and mentor junior engineers across the FA team.
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