Location: Town of Islip
HE ROLE:
The focus of this role is to plan, develop, and execute the SoC verification of new and existing features for AMD’s ASIC and FPGA SoCs, ensuring there are no bugs in the final design.
THE PERSON:
You have a passion for next-generation FPGA and ASIC design verification. You are a team player with excellent communication skills and experience collaborating with engineers across different sites and time zones. You possess strong analytical and problem-solving abilities, and you're eager to learn and take on challenges.
KEY RESPONSIBILITIES:
• Work as a member of a geographically distributed SoC verification team to verify next-generation ASIC and FPGA SoCs.
• Collaborate with design , software and architecture teams to verify SoC design under test.
• Develop SoC testplans, implement test benches, create testcases, and ensure functional coverage closure.
• Handle regression testing and contribute to verification infrastructure development.
• Develop both directed and random verification tests.
• Debug test failures, identify root causes, and work with RTL and firmware engineers to resolve design defects and test issues.
• Review functional and code coverage metrics, modify or add tests or constrain random tests to meet coverage requirements
PREFERRED EXPERIENCE:
• Proficient in SoC and IP-level FPGA and ASIC verification.
• Strong understanding of SoC architecture.
• Proficient in Verilog/System Verilog, C/C++, and scripting languages such as Perl or Python.
• Hands-on experience with System Verilog and UVM is mandatory.
• Experience in developing UVM-based verification test benches, processes, and flows.
• Solid understanding of design flow, verification methodology, and general computational logic design and verification
ACADEMIC CREDENTIALS:
• Bachelor’s degree with 4+ years of experience, or Master’s degree with 2+ years of experience in Computer Engineering or Electrical Engineering.
LOCATION:
Singapore
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