L3harris is seeking digital verification engineers to support our development of secure tactical communication products. The candidate will function primarily in an FPGA verification role, working in a cooperative team environment to verify and test embedded FPGA firmware for radio communication systems. Successful candidates must have familiarity with a coverage-driven verification methodology from planning through closure as well as knowledge of industry standard interfaces. Candidate will be required to analyze requirements, create test specifications/plans, write tests in System Verilog within a UVM test bench framework, and verify designs meet requirements. Candidate will work with cross functional teams to verify FPGA designs for radio product development projects.
Essential Functions:
• Perform FPGA design verification and validation of embedded electronic communication systems using SystemVerilog and UVM verification techniques
• Assist in development of high-level and detailed verification test plans consistent with system requirements and specifications
• Develop self-checking test benches for FPGA design verification and validation using SystemVerilog.
• Develop Agents, Test sequences, Covergroups, Predictors, Scoreboards.
• Develop randomized and directed tests to achieve closure on functional coverage and provide feedback to team to reach functional coverage goals
• Develop high-level and detailed verification test plans and test benches consistent with system requirements and specifications
• Work with cross functional teams as needed to define and verify product and design requirements.
• Prepare design and implementation reviews. Present technical briefings and status to internal and external customers.
Qualifications:
• Bachelor’s Degree and minimum 4 years of prior relevant experience. Graduate Degree and a minimum of 2 years of prior related experience. In lieu of a degree, minimum of 8 years of prior related experience. verifying FPGA/ASIC based embedded system solutions.
Preferred Additional Skills:
• Proficiency in Object Oriented Programming(C++, JAVA)
• Proven proficiency in FPGA/ASIC verification using SystemVerilog
• Exposure to UVM/OVM methodology
• Experience with Advanced Functional Verification tools to report functional coverage
• Experience with scripting languages (Bash, Perl, Python, Tcl
• Familiarity in working within Linux OS
• Familiarity with industry standard interfaces (Ethernet, AXI, SPI)
• Solid verbal and written communication skills
• Highly motivated, self-starter, who works well in team environments
• Demonstrated ability to analyze and debug FPGA firmware and related hardware issues
• Working knowledge of Ethernet Standard and design experience related to Ethernet packet processing.
• Expeience with cyrptographic algorithms and crypptographic solutions for embedded communication systems
• Experience with Mentor Graphics Verification tools
• FPGA/ASIC RTL Design experience
• Active Secret Clearence
In compliance with pay transparency requirements, the salary range for this role in New York State is $74,000 - $138,000. This is not a guarantee of compensation or salary, as final offer amount may vary based on factors including but not limited to experience and geographic location. L3Harris also offers a variety of benefits, including health and disability insurance, 401(k) match, flexible spending accounts, EAP, education assistance, parental leave, paid time off, and company-paid holidays. The specific programs and options available to an employee may vary depending on date of hire, schedule type, and the applicability of collective bargaining agreements.