RLA Engineering is a family, minority, and veteran-owned engineering and professional services firm based in Vancouver, Washington. Established in 2010, we pride ourselves on our commitment to integrity and respect in all our relationships, providing managed services, workforce staffing, and outsourced design across the United States.
Position Summary
This position is responsible for supporting engineers in the client’s business unit(s) by performing simulations of ASIC/SoC designs to verify performance vs specifications. The team is looking for strong individual contributors to do hands-on development and debug, and is not looking for a people manager or lead to fill these roles. The team is currently working on a relatively complex IP with quite a few blocks and requires support with IP verification. This role will spend most of their time working in the verification environment site, with most of that time spent on debugging
Responsibilities
• Understand assigned design needs from an ASIC’s specification, architectural design, functional models, etc. to optimize RTL synthesis planning
• Develop test plans, test benches, and test coverage models to verify and debug RTL code and synthesized netlists
• Use various hardware description languages
• Utilize design for testability methodologies
• Use various synthesis tools
• Utilize various programming languages for test automation
• Develop logical equivalence checking work flows including up to formal equivalence verification
• Collaborate with IC design and layout engineers on optimizing specifications, managing constraints and engineering change orders, and determining expected performance limits
• Document issues and propose recommendations to team including senior management
• Perform other duties as needed
Education and Credential Requirements
• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field; Preferred Master’s degree
• Eligible to work in the US without RLA sponsorship for employment visa status
Experience Requirements
• 10+ years of experience in a pre-silicon verification engineer role
• Minimum 10 years experience with verification for SoCs including a knowledge of C programming and comfortable with C based test infrastructure for verification
• Minimum 10 years experience with writing test-plans for complex IP architecture – dev and debug for SoC level test, AXI/AMBA protocols
• Minimum 4+ years experience with UVM based TB development from scratch, including UVM sequence, scoreboard, coverage, assertions coding
• Experience converting circuit block diagrams, pseudo code, reference circuit schematics, and other functionality descriptions to RTL using hardware description languages
• Experience using various RTL synthesis tools such as Design Compiler, Fusion Complier, Genus, or similar tools
• Experience using equivalence checking tools such as Candence Conformal, Synopsys Formality, or similar tools
• Experience debugging RTL and netlists through verification workflows
• 10+ years of experience developing test applications/automation and data analysis reports using programming languages such as TCL, Python, Perl, SQL, UNIX bash/Makefile
• Experience working on cross functional teams including analog/digital/mixed signal IC design and layout engineers
Skills Requirements
• Ability to read, write, and speak English proficiently
• High proficiency using productivity software such as M365 (Word, Outlook, Excel, PowerPoint, Visio, Teams, and SharePoint)
• Ability to use project/program management principles and methodologies to consistently meet task deadlines, triage changing priorities, and track issues to resolution
• Ability to collaborate across diverse teams with a customer service mindset
Work Environment
• The position typically operates in a standard office environment and/or from employee’s home
• Be able to lift and/or move up to 25 pounds
Job Types: Full-time, Contract
Pay: $81.14 - $84.01 per hour
Benefits:
• 401(k)
• 401(k) matching
• Dental insurance
• Health insurance
• Life insurance
• Vision insurance