Company Description
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Role Description
This is a full-time hybrid role for a Principal ASIC Design Engineer located in Palo Alto, CA, with some work-from-home flexibility. The Principal ASIC Design Engineer will be responsible for designing, developing, and verifying ASICs, overseeing both logic and physical design aspects. Day-to-day tasks include RTL coding and design, formal verification, and coordinating with team members to ensure project milestones are met. The candidate will also be expected to mentor junior engineers and contribute to the continuous improvement of design methodologies.
Qualifications
• Proficiency in Logic Design and Physical Design
• Experience with RTL Design and RTL Coding
• Skills in Formal Verification
• Strong analytical and problem-solving abilities
• Excellent teamwork and communication skills
• Bachelor's or Master's degree in Electrical Engineering or related field
• Experience with industry-standard EDA tools is a plus
• Familiarity with project management principles is beneficial