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Mixed Signal Engineer Intern

Ambarella
Full-time
On-site
About the position

As a Mixed Signal Engineer Intern, you will be an integral part of the mixed signal team, collaborating closely with senior circuit designers. Your primary responsibilities will involve the design, validation, and characterization of mixed signal and analog IP blocks for System on Chip (SoC) applications. The IP blocks you will work on include Phase-Locked Loops (PLL), Delay-Locked Loops (DLL), Serializer/Deserializer (SERDES), high-speed I/O, and data converters, specifically tailored for sub-14nm technologies. This internship offers a unique opportunity to gain hands-on experience and exposure to a wide array of circuits and technologies, enhancing your understanding of the field and preparing you for future roles in mixed signal engineering. Throughout your internship, you will engage in various tasks that will deepen your knowledge of analog integrated circuit design and digital logic design. You will also have the chance to develop your skills in Verilog coding, which is essential for digital design. The role requires excellent communication skills, as you will be working in a team environment and need to convey complex ideas clearly and effectively. Additionally, having lab skills will be advantageous, as you may be involved in practical experiments and testing. Knowledge of signal integrity will also be beneficial, as it plays a crucial role in the performance of mixed signal circuits. This internship is ideal for candidates pursuing a Master’s or Ph.D. in Electrical Engineering, and we are open to considering summer interns as well.

Responsibilities
• Collaborate with senior circuit designers on mixed signal and analog IP block design.
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• Participate in the validation and characterization of IP blocks for SoC applications.
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• Work on various IPs including PLL, DLL, SERDES, high-speed I/O, and data converters.
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• Gain exposure to sub-14nm technology processes.
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• Develop skills in analog integrated circuit design and digital logic design.

Requirements
• Strong fundamentals in analog integrated circuit design.
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• Good knowledge of digital logic design, including Verilog coding.
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• Excellent communication skills.
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• Lab skills are a plus.
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• Knowledge of signal integrity is a plus.
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• Pursuing an MS or Ph.D. in Electrical Engineering.

Nice-to-haves
• Experience with lab skills.
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• Familiarity with signal integrity concepts.

Benefits