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FPGA DSP Firmware Design Engineer

Leidos
Full-time
On-site
About the position

The EW Division of Leidos is seeking a highly skilled FPGA DSP Firmware Design Engineer to join a dynamic and multi-disciplined design team. This role involves the design, development, simulation, and integration of complex Digital Signal Processing (DSP) FPGA designs and RF sensor systems, tailored to meet specific project requirements. The ideal candidate will possess a robust background in DSP algorithms and their implementation using MATLAB and FPGAs, contributing to a fast-paced, collaborative environment. The engineer will also play a crucial role in the integration, testing, and verification of final products, ensuring that all designs meet the necessary specifications and performance standards. In this position, the engineer will analyze, design, simulate, and implement algorithms using hardware descriptor languages (HDL) such as VHDL and Verilog, based on customer requirements and MATLAB models. Collaboration with electrical engineers, systems engineers, and scientists is essential to successfully design and integrate DSP applications for advanced System on a Chip (SoC) implementations, including Xilinx Zynq Ultrascale+, Intel Stratix-10, and Xilinx RFSoC. The engineer will also be responsible for developing HDL test benches for code validation, performing design constraints generation, and evaluating synthesis and timing performance reports. The role requires the implementation and validation of various signal processing concepts, including FFTs, digital filters, and adaptive processing, into modular HDL designs. The engineer will analyze schematic diagrams for both custom and commercial-off-the-shelf electronic hardware, ensuring compatibility with high-speed digital and analog circuitry. Additionally, the engineer will maintain comprehensive documentation, including requirements documents and functional specifications, and will develop project test plans and procedures to support lab and field testing. Occasional travel may be required for field support and testing, and the engineer will provide status reports to project managers as needed. This position offers an exciting opportunity to work on cutting-edge technology in the field of electronic warfare and signal processing, contributing to the development of next-generation systems.

Responsibilities
• Analyze, design, simulate, and implement algorithms in hardware descriptor languages (HDL) based on customer requirements and/or MATLAB models.
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• Collaborate with a multi-disciplined design team to design and integrate challenging DSP FPGA designs and RF sensor systems.
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• Design and integrate DSP applications for latest System on a Chip (SoC) implementations such as Xilinx Zynq Ultrascale+, Intel Stratix-10, and Xilinx RFSoC.
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• Implement HDL test benches for code validation and validation against models.
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• Perform design constraints generation and verification, and evaluate synthesis and timing performance reports.
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• Implement and validate signal processing concepts such as FFTs, channelizers, digital filters, and adaptive processing into HDL designs.
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• Analyze and design interfaces to common signaling standards and protocols such as PCIe, JESD204B, and LVDS.
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• Analyze schematic diagrams for custom or commercial-off-the-shelf electronic hardware involving high-speed digital and/or analog circuitry.
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• Develop and maintain requirements documents, functional specification documents, and interface control documents.
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• Generate and maintain engineering drawings and configuration management policies for FPGA project hierarchy.
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• Develop project test plans and test procedures, and assist in lab and field testing execution.
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• Provide technical support and field support planning as needed.
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• Conduct experimental tests on FPGA and SoC evaluation boards, evaluate results, and develop specifications for next-generation components.
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• Interact with outside customers, suppliers, and functional peer groups.
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• Provide status reports to project managers and/or division production manager as required.

Requirements
• Must have a current Secret clearance with the ability to obtain a TS/SCI level clearance.
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• Experience with at least one FPGA Integrated Design Environment tool set such as Xilinx Vivado and Mentor Graphics ModelSim.
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• Experience in signal processing theory and communications systems, with the ability to apply theoretical knowledge to real-world problems.
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• Experience with MATLAB signal processing environment.
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• BS in Electrical Engineering, Computer Engineering, or a related degree.
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• Minimum of 4 years of relevant experience.

Nice-to-haves
• MS in Electrical Engineering, Computer Engineering, or a related field.
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• Experience writing test software in C/C++ or assembly language to validate design.
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• 5 to 8 years of relevant experience.
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• Experience with hardware integration, test and debug tools (high-speed logic analyzers, scopes, spectrum analyzers, etc.).
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• Familiarity with Electronic Warfare applications.
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• Experience with high-speed (> GHz) design techniques.
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• ARM or RISC-V embedded processor based SoC design experience.
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• Experience with performance characteristics of analog data converters, ADCs/DACs.
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• Familiarity with JESD204B.
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• Existing Top Secret Clearance.

Benefits